Reduction of Polling Cycle to Check Trigger Condition for Instrument Synchronization

The research is devoted to investigate about the coordination in the time domain of the operations executed by the Measurement Instrument (MI) connected to the node of the Distributed Measurement System (DMS), by hardware interface, and the node clock. To avoid the random effects of concurrency of the software processes, the interface is based on the Programmable Logic Device (PLD). From the analysis of the operations executed by the control program on PLD, operating conditions are shown that make not deterministic the detection of the trigger condition and, consequently, make random variation of the synchronization delay of the MI to the node clock. In order to detect the causes of the random variation, the polling cycle is taken into account and analyzed. From this analysis the model of the uncertainty affecting the synchronization delay is pointed out in order to evaluate the effects of each cause affecting the trigger check. The result of this evaluation furnishes the information to point out the adequate strategy to reduce the random variation of the detection of the trigger condition. Experimental tests are shown to validate the proposed strategy.